The present invention relates in general to semiconductor devices and, more particularly, to small footprint packaged integrated circuits.
Electronic system manufacturers continue to demand components with higher performance and reliability along with a reduced physical size and manufacturing cost. In response, semiconductor manufacturers are developing techniques to reduce the component size and cost by mounting multiple components on a single leadframe which is encapsulated to form a single integrated circuit package.
The size of an integrated circuit package is determined in part by the minimum feature size of the package""s leadframe, which sets the width and spacing of the leads. The minimum feature size typically is about equal to the thickness of the leadframe metal, which is a function of the mechanical requirements of the package and the electrical and thermal specifications of the encapsulated circuit. For example, high power circuits often require thicker leadframe metal to support high current levels and adequately dissipate heat generated by the circuit.
Small interconnect feature sizes previously have been achieved by mounting the circuitry on an interposer. An interposer is a type of printed circuit board with layers of thin metal foil sandwiched between dielectric layers and etched to produce the interconnect lines that electrically connect to the components mounted on the interposer. The metal foil is thin, so small feature sizes are achievable. However, for high current devices, the interposer""s thin metal lines must be made wide, which offsets the benefit of using a thin foil layer and increases the package footprint. For high power applications, the high thermal resistance of the interposer""s thin metal foil results in inadequate heat removal. Moreover, interposers have a high fabrication cost, which further limits their application.
Other devices use a rolled metal leadframe that achieves small feature sizes by thinning the metal with a half-etch technique that selectively etches away portions of the thickness of the leadframe. However, half etching is poorly controlled, and packages have a low reliability due to inadequate adhesion of the encapsulant to the curved surfaces of the half etched leadframe and the resulting encapsulant liftoff.
Hence, there is a need for an integrated circuit and package that can house multiple components in a small footprint, has a high current and thermal dissipation capability and a high reliability while maintaining a low manufacturing cost.